培训方式以讲课和实验穿插进行

　HSIM是全球第一个满足深亚微米设计需求的全电路、层次化的晶体管级仿真器。它可以准确的仿真电路的各种行为，包括：电路的功能、电压和电流波形、时序和功率信息、电源网络的电压降、串扰噪声以及地弹反射等。由于采用了创新的层次化数据存储和同构匹配算法，HSIM对仿真的电路规模几乎没有限制。层次化数据存储免除了仿真器处理电路臃余单元和子电路对内存的需求，因此HSIM可以容易地做到高容量的全电路仿真；同构匹配可以减少对臃余单元和子电路的计算量。
HSIM为高级IC设计人员提供了一整套全芯片电路验证所需要的功能，包括：?
·分级存储：应用高效分级结构数据库减少内存使用量并扩大电路尺寸。?
·回归模块矩阵解算程序：采用分级结构进行电路模拟，精度接近SPICE。?
·分级RC抑制算法：降低分级结构电路数据库中寄生电阻和电容的复杂程，减少精度损失。?
·布局之后寄生现象的后向注解：提供有效的布局后模拟和分析，存储器需求少。?
HSIM可以向SPICE一样用于任何电路的瞬态仿真，而且它比SPICE快无数倍。
HSIM的强项在于它维持高精度和快速的情况下，对数以千万记的晶体管的仿真能力。
HSIM的用户可以用它来对大的电路模块、一组电路模块或者整个电路做晶体管级仿真。
两天的课程安排：
第一阶段
　　　　 HSIMplus platform overview
　　　　 Software download and installation
　　　　 HSIM input/output files
　　　　 Basic HSIM setup
第二阶段
　　　　 Accuracy vs speed
　　　　 Back-annotation
　　　　 Interactive debugging

This training will teach you how to use the Synopsys HSIM FastSpice simulator. It will introduce HSIMplus, a comprehensive platform for simulation and analysis of high performance analog, mixed-signal, memory, and system on-chip designs including important post-layout effects.

The HSIMplus platform is built on the HSIM simulator to provide a fully integrated solution for nanometer IC design, including options for dynamic voltage drop analysis considering the timing impact of power net variation; reliability analysis of power and signal nets; coupling capacitance and dynamic crosstalk behavior; and MOSFET device reliability. Integrations with Cadence’s analog design environment and various HDL simulators, as well as circuit screening complete the set of available options.

 

第二阶段

Unit 1 Hsim basic training

?HSIM instruction

?HSIM Technology

?Setting HSIM Parameters

?HSIM Speed/accuracy tradeoff adjustment

?HSIM DC Analysis

?Interactive Debugging

?Misc. Features

Unit 2 Hsim advanced training

?Postlayout Simulation Flow

?Power Net/Signal Net/Mosfet Reliability Analysis

?Co-Simulation instruction

?Customer Support Introduction

 

OBJECTIVES

At the end of this workshop the student should be able to:

• Learn the fundamentals of HSIM
• Learn how to set up a basic simulation
• Learn timing and power analysis commands
• Learn netlist settings for back-annotation
• Acquire hands on experience from course lab exercises

AUDIENCE PROFILE

This training is targeted for analog and/or mixed-signal designers.