北京上海成都西安Virtuoso Chip Assembly Router培训哪家好哪里有收费情况深圳成都南京苏州杭州

上课地点：【上海】：同济大学(沪西)/新城金郡商务楼(11号线白银路站) 【深圳分部】：电影大厦(地铁一号线大剧院站)/深圳大学成教院【北京分部】：北京中山学院/福鑫大楼【南京分部】：金港大厦(和燕路) 【武汉分部】：佳源大厦（高新二路）【成都分部】：领馆区1号（中和大道）【沈阳分部】：沈阳理工大学/六宅臻品【郑州分部】：郑州大学/锦华大厦【石家庄分部】：河北科技大学/瑞景大厦【广州分部】：广粮大厦【西安分部】：协同大厦
最近开课时间(周末班/连续班/晚班）：Virtuoso Chip Assembly Router培训：2020年3月16日

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　　Virtuoso Chip Assembly Router培训

培训方式以讲课和实验穿插进行

课程描述：

Virtuoso Chip Assembly Router Course Description

This course explores the basic design flow for device-level and chip-level routing with?Virtuoso Chip Assembly Router. You will focus on methods of solving typical problems?while routing a top-level block design.

The highlights of this class include the following:

Learn about available translators for the Virtuoso Chip Assembly Router
Find, analyze, and solve typical problems
Explore component placement techniques
Understand routing techniques (automatic and interactive)
Create rules for clearance, timing, and noise
Explore power routing capabilities
Route device-level designs
Route a chip-level design

Audience

DSM Designers
Chip Designers
The primary audience includes experienced chip assembly users who are interested in improving block and chop assembly routing techniques for their design flows

Prerequisites

Students should already have knowledge of:

Virtuoso Layout Editor
Virtuoso XL Layout Editor

Students should have practical experience with:

UNIX OS

Course Agenda

Introduction
Preparing and translating data
Virtuoso Chip Assembly Router environment
Interactive placement
Interactive routing
Using rules and levels
How the autorouter works
Creating device-level designs
Creating chip-assembly deisgner